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? semiconductor components industries, llc, 2011 november, 2011 ? rev. 2 1 publication order number: ncv8406/d ncv8406, ncv8406a self-protected low side driver with temperature and current limit 65 v, 7.0 a, single n ? channel ncv8406/a is a three terminal protected low-side smart discrete device. the protection features in clude overcurrent, overtemperature, esd and integrated drain-to-gate clamping for overvoltage protection. this device offers protection an d is suitable for harsh automotive environments. features ? short circuit protection ? thermal shutdown with automatic restart ? over voltage protection ? integrated clamp for inductive switching ? esd protection ? dv/dt robustness ? analog drive capability (logic level input) ? these devices are faster than the rest of the ncv devices ? aec ? q101 qualified and ppap capable ? ncv prefix for automotive and other applications requiring unique site and control change requirements ? these devices are pb ? free and are rohs compliant typical applications ? switch a variety of resistive, inductive and capacitive loads ? can replace electromechanical relays and discrete circuits ? automotive / industrial drain source temperature limit gate input current limit current sense overvoltage protection esd protection v dss (clamped) r ds(on) typ i d typ (limited) 65 v 210 m 7.0 a http://onsemi.com sot ? 223 case 318e style 3 marking diagram a = assembly location y = year w, ww = work week xxxxx = v8406 or 8406a g or = pb ? free package 1 (note: microdot may be in either location) 1 ayw xxxxx 23 4 gate drain source drain 2 3 4 1 2 3 4 dpak case 369c yww xxxxxg see detailed ordering and shipping information in the package dimensions section on page 10 of this data sheet. ordering information
ncv8406, ncv8406a http://onsemi.com 2 maximum ratings (t j = 25 c unless otherwise noted) rating symbol value unit drain ? to ? source voltage internally clamped v dss 70 vdc gate ? to ? source voltage v gs 14 vdc drain current continuous i d internally limited total power dissipation ? sot ? 223 version @ t a = 25 c (note 1) @ t a = 25 c (note 2) p d 1.25 1.81 w total power dissipation ? dpak version @ t a = 25 c (note 1) @ t a = 25 c (note 2) p d 1.31 2.31 w thermal resistance ? sot ? 223 version junction ? to ? case junction ? to ? ambient (note 1) junction ? to ? ambient (note 2) r jc r ja r ja 7.0 100 69 c/w thermal resistance ? dpak version junction ? to ? case junction ? to ? ambient (note 1) junction ? to ? ambient (note 2) r jc r ja r ja 1.0 95 54 c/w single pulse inductive load switching energy (starting t j = 25 c, v dd = 50 vdc, v gs = 5.0 vdc, i l = 2.1 apk, l = 50 mh, r g = 25 ) e as 110 mj load dump voltage (v gs = 0 and 10 v, r i = 2 , r l = 7 , t d = 400 ms) v ld 75 v operating junction temperature range t j ? 40 to 150 c storage temperature range t stg ? 55 to 150 c stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability. 1. surface mounted onto minimum pad size (100 sq/mm) fr4 pcb, 1 oz cu. 2. mounted onto 1 square pad size (700 sq/mm) fr4 pcb, 1 oz cu. drain source gate vds vgs i d i g + ? + ? figure 1. voltage and current convention
ncv8406, ncv8406a http://onsemi.com 3 mosfet electrical characteristics (t j = 25 c unless otherwise noted) characteristic symbol min typ max unit off characteristics drain ? to ? source clamped breakdown voltage (v gs = 0 v, i d = 2 ma) v (br)dss 60 65 70 v zero gate voltage drain current (v ds = 52 v, v gs = 0 v) i dss ? 22 100 a gate input current (v gs = 5.0 v, v ds = 0 v) i gss ? 30 100 a on characteristics gate threshold voltage (v ds = v gs , i d = 150 a) threshold temperature coefficient v gs(th) 1.2 ? 1.66 4.0 2.0 ? v ? mv/ c static drain ? to ? source on ? resistance (note 3) (v gs = 10 v, i d = 2.0 a, t j @ 25 c) r ds(on) ? 185 210 m static drain ? to ? source on ? resistance (note 3) (v gs = 5.0 v, i d = 2.0 a, t j @ 25 c) (v gs = 5.0 v, i d = 2.0 a, t j @ 150 c) r ds(on) ? ? 210 445 240 520 m source ? drain forward on voltage (i s = 7.0 a, v gs = 0 v) v sd ? 0.9 1.1 v switching characteristics (note 6) turn ? on delay time r l = 6.6 , v in = 0 to 10 v, v dd = 13.8 v, i d = 2.0 a, 10% v in to 10% i d td (on) ? 127 ? ns turn ? on rise time r l = 6.6 , v in = 0 to 10 v, v dd = 13.8 v, i d = 2.0 a, 10% i d to 90% i d t rise ? 486 ? ns turn ? off delay time r l = 6.6 , v in = 0 to 10 v, v dd = 13.8 v, i d = 2.0 a, 90% v in to 90% i d td (off) ? 1600 ? ns turn ? off fall time r l = 6.6 , v in = 0 to 10 v, v dd = 13.8 v, i d = 2.0 a, 90% i d to 10% i d t fall ? 692 ? ns slew rate on r l = 6.6 , v in = 0 to 10 v, v dd = 13.8 v, i d = 2.0 a, 70% to 50% v dd dv ds /dt on ? 79 ? v/ s slew rate off r l = 6.6 , v in = 0 to 10 v, v dd = 13.8 v, i d = 2.0 a, 50% to 70% v dd dv ds /dt off ? 27 ? v/ s self protection characteristics (note 4) current limit v ds = 10 v, v gs = 5.0 v, t j = 25 c (note 5) v ds = 10 v, v gs = 5.0 v, t j = 150 c (notes 5, 6) v ds = 10 v, v gs = 10 v, t j = 25 c (notes 5) i lim 5.0 3.5 6.5 7.0 4.5 8.5 9.5 6.0 10.5 a temperature limit (turn ? off) v gs = 5.0 v (note 6) t lim(off) 150 180 200 c thermal hysteresis v gs = 5.0 v t lim(on) ? 10 ? c temperature limit (turn ? off) v gs = 10 v (note 6) t lim(off) 150 180 200 c thermal hysteresis v gs = 10 v t lim(on) ? 20 ? c input current during thermal fault v ds = 0 v, v gs = 5.0 v, t j = t j > t (fault) (note 6) v ds = 0 v, v gs = 10 v, t j = t j > t (fault) (note 6) i g(fault) ? ? 5.9 12.3 ? ma esd electrical characteristics electro ? static discharge capability human body model (hbm) machine model (mm) esd 6000 500 ? ? ? ? v 3. pulse test: pulse width 300 s, duty cycle 2%. 4. fault conditions are viewed as beyond the normal operating range of the part. 5. current limit measured at 380 s after gate pulse. 6. not subject to production test.
ncv8406, ncv8406a http://onsemi.com 4 typical performance curves figure 2. single pulse maximum switch ? off current vs. load inductance figure 3. single ? pulse maximum switching energy vs. load inductance l (mh) l (mh) 100 10 1 10 100 10 100 1000 figure 4. single pulse maximum inductive switch ? off current vs. time in clamp figure 5. single ? pulse maximum inductive switching energy vs. time in clamp time in clamp (ms) time in clamp (ms) 10 1 0.1 1 10 10 1 10 1000 ilmax (a) emax (mj) ilmax (a) emax (mj) t jstart = 25 c t jstart = 150 c t jstart = 25 c t jstart = 150 c t jstart = 25 c t jstart = 150 c t jstart = 25 c t jstart = 150 c 10 100 3 v 150 c v ds (v) v gs (v) 15 10 5 0 0 2 6 10 12 5 4 3 2 1 0 0 3 6 9 12 i d (a) i d (a) 8 v gs = 2.5 v 3.3 v 4 v 5 v 6 v 7 v 8 v 9 v 10 v ? 40 c 25 c 100 c figure 6. on ? state output characteristics figure 7. transfer characteristics t a = 25 c v ds = 10 v 4
ncv8406, ncv8406a http://onsemi.com 5 typical performance curves figure 8. r ds(on) vs. gate ? source voltage figure 9. r ds(on) vs. drain current v gs (v) i d (a) r ds(on) (m ) r ds(on) (m ) ? 40 c 25 c 100 c 150 c ? 40 c, v gs = 5 v ? 40 c, v gs = 10 v 25 c, v gs = 5 v 25 c, v gs = 10 v 100 c, v gs = 5 v 100 c, v gs = 10 v 150 c, v gs = 5 v figure 10. normalized r ds(on) vs. temperature figure 11. current limit vs. gate ? source voltage t ( c) v gs (v) 120 100 80 40 20 0 ? 20 ? 40 0.5 1.0 1.5 2.0 2.5 normalized r ds(on) i lim (a) 60 ? 40 c 25 c 100 c 140 v gs = 5 v v gs = 10 v 100 200 300 400 500 600 345678910 50 100 200 300 350 400 450 500 0.5 1 1.5 2 2.75 150 c, v gs = 10 v 3 5 7 11 15 45 6 8 910 150 c 0.75 1.25 1.75 2.25 3 150 i d = 2 a v ds = 10 v 150 250 350 450 550 id = 2 a id = 0.5 a 250 2.5 7 9 13 figure 12. current limit vs. junction temperature figure 13. drain ? to ? source leakage current t j ( c) v ds (v) 70 60 50 40 30 20 10 0.0001 0.01 0.1 1 10 100 1000 i lim (a) i dss ( a) ? 40 c 25 c 100 c 150 c 5 7 9 11 15 ? 40 ? 20 0 20 40 60 80 100 120 140 v gs = 5 v v gs = 10 v v ds = 10 v v gs = 0 v 0.001 13
ncv8406, ncv8406a http://onsemi.com 6 typical performance curves figure 14. normalized threshold voltage vs. temperature figure 15. source ? drain diode forward characteristics t ( c) i s (a) 140 100 60 40 20 0 ? 20 ? 40 0.6 0.7 0.8 0.9 1.0 1.1 1.2 8 7 6 5 4 3 2 1 500 600 700 800 1000 1100 normalized v gs(th) (v) v sd (mv) 80 120 9 10 ? 40 c 25 c 100 c 150 c figure 16. resistive load switching time vs. gate ? source voltage v gs (v) 10 9 8 7 6 5 4 3 0 200 600 1000 1600 time (ns) t d(off) t d(on) t f t r i d = 150 a v ds = v gs 1200 v gs = 0 v v dd = 13.8 v i d = 2 a r g = 0 900 400 800 1400 figure 17. resistive load switching time vs. gate resistance r g ( ) 2000 1500 1000 500 0 ? 200 200 1400 3000 3400 time (ns) t d(on) , v gs = 5 v t d(off) , v gs = 5 v t r , v gs = 5 v t f , v gs = 5 v t d(on) , v gs = 10 v t d(off) , v gs = 10 v t r , v gs = 10 v t f , v gs = 10 v 2600 2200 1800 1000 600 figure 18. drain ? source voltage slope during turn on and turn off vs. gate resistance r g ( ) 2000 1500 1000 500 0 5 10 15 25 35 drain ? source voltage slope (v/ s) 20 30 dv ds /d t(off) , v gs = 5 v dv ds /d t(off) , v gs = 10 v
ncv8406, ncv8406a http://onsemi.com 7 typical performance curves 0.01 0.1 1 10 100 1000 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000 pulse time (sec) r(t) ( c/w) single pulse 50% duty cycle 20% 10% 5% 2% 1% 0.000001 0.01 0.1 1 10 100 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000 pulse time (sec) r(t) ( c/w) 0.000001 copper heat spreader area (mm 2 ) r ja ( c/w) pcb cu thickness, 1.0 oz 40 50 70 80 100 110 300 400 500 600 figure 19. r ja vs. copper area ? sot ? 223 100 200 pcb cu thickness, 2.0 oz copper heat spreader area (mm 2 ) r ja ( c/w) pcb cu thickness, 1.0 oz 40 50 70 80 100 110 300 400 500 600 figure 20. r ja vs. copper area ? dpak 100 200 pcb cu thickness, 2.0 oz figure 21. transient thermal resistance ? sot ? 223 version figure 22. transient thermal resistance ? dpak version 60 90 60 90 single pulse 50% duty cycle 20% 10% 5% 2% 1%
ncv8406, ncv8406a http://onsemi.com 8 test circuits and waveforms dut g d s rl vdd ids vin figure 23. resistive load switching test circuit rg + ? td(on) tr vin ids td(off) tf 10% 10% 90% 90% figure 24. resistive load switching waveforms
ncv8406, ncv8406a http://onsemi.com 9 test circuits and waveforms vdd ids vin l vds tp figure 25. inductive load switching test circuit dut g d s rg + ? 0 v 5 v t av vin ids vds t p v ds(on) i pk 0 vdd v (br)dss figure 26. inductive load switching waveforms
ncv8406, ncv8406a http://onsemi.com 10 ordering information device package shipping ? ncv8406stt3g sot ? 223 (pb ? free) 4000 / tape & reel ncv8406astt3g sot ? 223 (pb ? free) 4000 / tape & reel ncv8406dtrkg dpak (pb ? free) 2500 / tape & reel NCV8406ADTRKG dpak (pb ? free) 2500 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d.
ncv8406, ncv8406a http://onsemi.com 11 package dimensions sot ? 223 (to ? 261) case 318e ? 04 issue n a1 b1 d e b e e1 4 123 0.08 (0003) a l1 c notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: inch. 1.5 0.059 mm inches scale 6:1 3.8 0.15 2.0 0.079 6.3 0.248 2.3 0.091 2.3 0.091 2.0 0.079 h e dim a min nom max min millimeters 1.50 1.63 1.75 0.060 inches a1 0.02 0.06 0.10 0.001 b 0.60 0.75 0.89 0.024 b1 2.90 3.06 3.20 0.115 c 0.24 0.29 0.35 0.009 d 6.30 6.50 6.70 0.249 e 3.30 3.50 3.70 0.130 e 2.20 2.30 2.40 0.087 0.85 0.94 1.05 0.033 0.064 0.068 0.002 0.004 0.030 0.035 0.121 0.126 0.012 0.014 0.256 0.263 0.138 0.145 0.091 0.094 0.037 0.041 nom max l1 1.50 1.75 2.00 0.060 6.70 7.00 7.30 0.264 0.069 0.078 0.276 0.287 h e ? ? e1 0 1 0 0 1 0 l l 0.20 ??? ??? 0.008 ??? ??? style 3: pin 1. gate 2. drain 3. source 4. drain *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint*
ncv8406, ncv8406a http://onsemi.com 12 package dimensions dpak (single gauge) case 369c ? 01 issue d style 2: pin 1. gate 2. drain 3. source 4. drain b d e b3 l3 l4 b2 e m 0.005 (0.13) c c2 a c c z dim min max min max millimeters inches d 0.235 0.245 5.97 6.22 e 0.250 0.265 6.35 6.73 a 0.086 0.094 2.18 2.38 b 0.025 0.035 0.63 0.89 c2 0.018 0.024 0.46 0.61 b2 0.030 0.045 0.76 1.14 c 0.018 0.024 0.46 0.61 e 0.090 bsc 2.29 bsc b3 0.180 0.215 4.57 5.46 l4 ??? 0.040 ??? 1.01 l 0.055 0.070 1.40 1.78 l3 0.035 0.050 0.89 1.27 z 0.155 ??? 3.93 ??? notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: inches. 3. thermal pad contour optional within di- mensions b3, l3 and z. 4. dimensions d and e do not include mold flash, protrusions, or burrs. mold flash, protrusions, or gate burrs shall not exceed 0.006 inches per side. 5. dimensions d and e are determined at the outermost extremes of the plastic body. 6. datums a and b are determined at datum plane h. 12 3 4 5.80 0.228 2.58 0.102 1.60 0.063 6.20 0.244 3.00 0.118 6.17 0.243 mm inches scale 3:1 *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* h 0.370 0.410 9.40 10.41 a1 0.000 0.005 0.00 0.13 l1 0.108 ref 2.74 ref l2 0.020 bsc 0.51 bsc a1 h detail a seating plane a b c l1 l h l2 gauge plane detail a rotated 90 cw on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5817 ? 1050 ncv8406/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative

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